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DNP Unveils 10-Nanometre Nanoimprint Lithography Template
Dai Nippon Printing (DNP) has announced the development of a nanoimprint lithography (NIL) template with a circuit line width of 10 nanometres. The template supports patterning equivalent to the 1.4 nm logic generation. It addresses the miniaturisation demands of advanced logic semiconductors used in smartphones, data centres and NAND flash memory.
DNP has worked on NIL templates since 2003. These templates press circuit patterns directly into substrates. This approach lowers energy use during the exposure process. Over two decades, DNP has built strong expertise in highprecision patterning.
The new 10 nm template can replace part of the EUV lithography process. It enables advanced semiconductor manufacturing for customers without EUV production capability. By supplying this template, DNP broadens process options for chipmakers.
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